Product Summary
The CY62128VLL-70ZC is a 128K x 8 Static RAM. It is composed of three high-performance CMOS static RAMs organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Output Enable (OE) and three-state drivers. The CY62128VLL-70ZC has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The CY62128VLL-70SC is available in the standard 450-mil-wide SOIC, 32-lead TSOP-I, and STSOP packages.
Parametrics
CY62128VLL-70ZC absolute maximum ratings: (1)Storage Temperature: –65 to +150℃; (2)Ambient Temperature with Power Applied: –55 to +125℃; (3)Supply Voltage to Ground Potential: –0.5V to +4.6V; (4)DC Voltage Applied to Outputs in High Z State:–0.5V to VCC + 0.5V; DC Input Voltage: –0.5V to VCC + 0.5V; (5)Output Current into Outputs (LOW): 20 mA; (6)Static Discharge Voltage: >2001V; (7)Latch-Up Current: >200 mA.
Features
CY62128VLL-70ZC features: (1)Low voltage range: 2.7V–3.6V; (2)Low active power and standby power; (3)Easy memory expansion with CE and OE features; (4)TTL-compatible inputs and outputs; (5)Automatic power-down when deselected; (6)CMOS for optimum speed/power.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||
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CY62128VLL-70ZC |
IC SRAM 1MBIT 70NS 32TSOP |
Data Sheet |
Negotiable |
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||
CY62126BV |
Other |
Data Sheet |
Negotiable |
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CY62126DV30 |
Other |
Data Sheet |
Negotiable |
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CY62126DV30L-55BVXE |
Cypress Semiconductor |
SRAM SLO 3.0V SUPER LO PWR 64K X 16 SRAM |
Data Sheet |
Negotiable |
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CY62126DV30L-55BVXET |
Cypress Semiconductor |
SRAM SLO 3.0V SUPER LO PWR 64K X 16 SRAM |
Data Sheet |
Negotiable |
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CY62126DV30L-55ZSXE |
Cypress Semiconductor |
SRAM SLO 3.0V SUPER LO PWR 64K X 16 SRAM |
Data Sheet |
Negotiable |
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CY62126DV30L-55ZSXET |
Cypress Semiconductor |
SRAM SLO 3.0V SUPER LO PWR 64K X 16 SRAM |
Data Sheet |
Negotiable |
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